The reduction in memory cell area is required for high density DRAM ULSIs. This causes reduction in capacitor area, resulting in the reduction of the capacitance. A memory cell for each bit to be stored by the semiconductor DRAM typically consists of a storage capacitor and an access transistor. Either the source or drain of the transistor is connected to one terminal of the capacitor. The other side of the transistor and the transistor gate electrode are connected to external connection lines called a bit line and a word line, respectively. The other terminal of the capacitor is connected to a reference voltage. Thus, the formation of a DRAM memory cell comprises the formation of a transistor, a capacitor and contacts to external circuits.
As DRAM devices become more highly integrated, the area occupied by a capacitor of a DRAM storage cell typically shrinks. In order to achieve sufficient cell capacitance for the scaled dynamic random access memories(DRAMs), the high dielectric constant films such as Ta.sub.2 O.sub.5 and (Ba.sub.x Sr.sub.1-x)TiO.sub.3 have been investigated extensively. In particular, Ta.sub.2 O.sub.5 is just at the threshold of adoption to the DRAM capacitor. Even with the high dielectric constant films, however, simple planer stacked capacitors cannot provide a sufficient cell capacitance with the very small capacitor area of the 1 Gbit DRAM. As a result, a three-dimensional capacitor, or deep hole crown shape capacitor is required to increase the surface area. Previously, we reported a thermally robust Ta.sub.2 O.sub.5 capacitor with a TiN/poly-Si storage electrode. This capacitor is highly compatible with the present DRAM processes including high temperature planarization known as borophosphosilicate glass(BPSG) flow. As mentioned above, TiN has been used as the top electrode for DRAM capacitors, especially for the ones with Ta.sub.2 O.sub.5 -dielectrics. The present methods of deposition of TiN layer will result in the following disadvantages: (1) for the sputtered-TiN, it has the disadvantage of poor step coverage; (2) for the TiN prepared by the metal-organic chemical vapor deposition, it has the disadvantages of high electrode resistance and poor adhesion to Ta.sub.2 O.sub.5 due to high carbon concentration; and (3) it also has the possibility that the carbon with diffuse into the Ta.sub.2 O.sub.5 dielectric causing the increase of leakage current. For the CVD-TiN deposited by TaCl.sub.4 /NH.sub.3 or TaF.sub.5 /H.sub.2, the Cl and F also have the possibility of degrading the Ta.sub.2 O.sub.5 dielectric.